Selecting an LX2 Image

Select the correct prebuilt image for LX2160A and LX2162A platforms.

Selecting an LX2 Image

Each LX2 image filename identifies its supported hardware. Match every field before flashing an image.

Both SoCs use the same image directory.

LX2160A and LX2162A images appear under LX2k/lx2160a_build/. The directory does not identify the SoC. Check the first filename field first.

Select an image

Use this order to select an image:

1. Identify the SoC, module, and carrier board.
2. Choose a supported BSP branch.
3. Match the clocks, memory rate, and SerDes protocol.
4. Choose the image for your boot medium.

An S in the SerDes field requires modified hardware.

For stock hardware, use 8_5_2, not 8S_5_2. The S variant supports modules with swapped SerDes reference clocks. Flashing the wrong image does not produce an error.

Read the filename

<soc>_<rev>_<module>_<carrier>_<core>_<platform>_<ddr>_<serdes>-<commit>.img.xz

Field	Meaning	Selection guidance
lx2160a	SoC family	Use lx2160a or lx2162a.
rev2	Silicon revision	Usually rev2. Match the module label.
cex7	Module type	cex7 for LX2160A; som for LX2162A.
clearfog-cx	Carrier board	Carrier names depend on the SoC.
2000	Cortex-A72 clock	Use 2200 only with adequate cooling.
700	Platform clock	Fixed per SoC. Do not cross-copy.
2900	DDR4 rate	Do not exceed the fitted memory rate.
8_5_2	SerDes protocols	Encodes SD1_SD2_SD3. Check carefully.
5dc8a2e	Build commit	Include this value in support requests.
.img.xz	microSD image	An _xspi_ infix targets SPI flash.

Match the platform

The SoC determines valid modules, carriers, platform clocks, and SerDes protocols.

Field	LX2160A	LX2162A
SoC	lx2160a	lx2162a
Module	cex7 (COM Express Type 7)	som (System on Module)
Carrier	honeycomb, clearfog-cx	clearfog
Platform clock	700	650
SerDes example	8_5_2	3_9_0

clearfog and clearfog-cx are different boards.

clearfog-cx is the LX2160A mini-ITX carrier with a QSFP28 cage. clearfog is the LX2162A evaluation board. Match the carrier to the SoC.

Filename examples

lx2160a_rev2_cex7_honeycomb_2000_700_2900_8_5_2-5dc8a2e.img.xz
# LX2160A CEx7 module on HoneyComb. No QSFP.

lx2160a_rev2_cex7_clearfog-cx_2000_700_2900_8_5_2-5dc8a2e.img.xz
# LX2160A CEx7 module on ClearFog CX. QSFP fitted.

lx2160a_rev2_cex7_clearfog-cx_2000_700_2900_8S_5_2-5dc8a2e.img.xz
# Modified reference clocks only.

lx2162a_rev2_som_clearfog_2000_650_2900_3_9_0-5dc8a2e.img.xz
# LX2162A SoM on ClearFog. Note som, 650, and SD3 = 0.

Choose a BSP branch

The path identifies the BSP branch and build date. It does not identify the SoC.

.../LX2k/lx2160a_build/ls-5.15.71-2.2.0/2026-05-07_5dc8a2e/

Branch	Status
ls-6.6.52-2.2.0	Production-ready. Receives features and fixes.
ls-5.15.71-2.2.0	Legacy. Receives critical fixes only.

Choose one BSP branch and remain within it. Cross-branch comparisons can mislead troubleshooting.

SerDes configuration

The SerDes field uses SD1_SD2_SD3. Each number selects a lane configuration. A value of 0 means that block is unused.

LX2160A (HoneyComb / ClearFog CX)

SD2 (5) and SD3 (2) are fixed on these carriers. Select SD1:

SD1	Configuration
8	Default configuration. Use this as the starting point.
18	QSFP28 at 4×10G and four SFP+ ports at 4×10G.
20	40G on QSFP28. Combining it with 4×10G requires RCW customization.

SerDes-1 lanes 0–3 reach QSFP28 through retimers. Lanes 4–7 connect to four SFP+ ports. HoneyComb lacks the QSFP port. Do not select QSFP-oriented protocols for HoneyComb.

LX2162A (ClearFog)

ClearFog LX2162A provides two 10Gbps SFP+ ports. It also provides two 25Gbps SFP+ ports through a retimer. Eight RJ45 ports use a Marvell 88E2580 PHY.

Two optional mPCI slots disable two RJ45 ports. SD3 is unused, so its field is 0. Configurations such as 18_9 enable SFP ports at 10/25Gbps and RJ45 ports at 1Gbps.

The S suffix

The CEx7 module uses PLLF = 161.1328125 MHz and PLLS = 100 MHz. Spread spectrum is disabled. Swapped clock sources require a SolidRun-supported hardware modification.

An S image contains an RCW for those modified modules. On unmodified hardware, it can cause:

• The board boots into Linux normally.
• SFP+, SFP28, and QSFP ports never establish link.
• dpmac interfaces never report carrier-up.
• DPAA2 errors appear, or U-Boot hangs early.

Use a numeric SerDes field unless SolidRun modified that module. If you are unsure, treat the module as stock hardware.

Selection checklist

Before flashing, verify:

1. SoC: lx2160a or lx2162a.
2. Module: cex7 for LX2160A; som for LX2162A.
3. Carrier: honeycomb or clearfog-cx for LX2160A; clearfog for LX2162A.
4. Revision: usually rev2; confirm the module label.
5. Branch: use one BSP branch consistently.
6. Boot media: use the plain image for microSD. Use _xspi_ for SPI flash.
7. Platform clock: 700 for LX2160A; 650 for LX2162A.
8. DDR rate: use the fitted rate or lower. ECC and non-ECC images differ.
9. Core clock: use 2000 unless cooling supports 2200.
10. SerDes: start with the platform default. Verify there is no S on stock hardware.

Verifying the running configuration

cat /sys/firmware/devicetree/base/model; echo
dmesg | grep -iE 'serdes|dpmac|lynx|fsl-mc'

The device tree model identifies the SoC and carrier. The U-Boot serial banner is authoritative. It prints SerDes reference clocks and the selected protocol. Capture the log from power-on.

The device tree name does not prove the RCW is correct. U-Boot selects the DTB from the RCW SerDes protocol value.

Troubleshooting

Symptom	Likely cause
Boots normally, but no ports link	An S variant on stock hardware
QSFP inactive; SFP+ works	Incorrect SD1, or HoneyComb image on ClearFog CX
No serial output	Wrong SoC, module, revision, or boot-medium image
Wrong port count	An LX2160A image on LX2162A, or the reverse
Memory test failures	DDR rate exceeds fitted memory
Regression after update	Image comes from another BSP branch
Throttling or shutdown	2200 core clock without enough cooling

Reporting an issue

Include:

• The complete image URL, including branch and commit.
• The board SKU, carrier, and module.
• Any clock or SD1 hardware modification.
• The full serial console log from power-on.

References

• LX2160A CEx7 hardware user manual
• HoneyComb LX2 / ClearFog CX LX2 Quick Start Guide

• ClearFog LX2162A Quick Start Guide

• SolidRun LX2 prebuilt images
• SolidRun lx2160a_build repository

For production deployments, confirm modified-clock requirements with SolidRun support.